A Process Variation Tolerant OTA Design for Low Power ASIC Design

A Process Variation Tolerant OTA Design for Low Power ASIC Design

Technology development and continuous down scaling in CMOS fabrication makes Mixed Signal Integrated Circuits (MSIC) more vulnerable to process variation. This paper presents a well defined novel design methodology for process variability aware design by incorporating the major challenge of statistical circuit performance relating the device and circuit level variation in an accurate and effici...

Low-Power Variation-Tolerant Design in Nanometer Silicon

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On Process Variation Tolerant Low Cost Thermal Sensor Design

A Radiation-Tolerant Low-Power Transceiver Design for Reconfigurable Applications

This paper describes the ongoing development of a radiation-tolerant version of ITT Industries’ Low-Power Transceiver (LPT). The LPT is a compact, flexible device that can be configured to perform custom communications and navigation functions in terrestrial, airborne, and space applications. The radiation-tolerant version of the LPT will maintain most of the LPT’s existing functionality and re...

Variation-tolerant design

As the guest editors and I introduce this year’s Hot Chips theme issue, the frequency slowdown trend that is upon the industry as a result of the CMOS technology outlook has to be the single major point that stands out. It is not just the per-chip power dissipation envelope that forces this trend, although that factor alone is perhaps the major deterrent to frequency escalation at prior (histor...